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| (R) STV160NF03L N - CHANNEL 30V - 0.0019 - 160A PowerSO-10 STripFETTM MOSFET TYPE STV160NF03L s s s s s s s V DSS 30 V R DS(on ) < 0.0028 ID 160 A TYPICAL RDS(on) = 0.0019 ULTRA LOW ON-RESISTANCE ULTRA FAST SWITCHING 100% AVALANCHE TESTED VERY LOW GATE CHARGE LOW THRESHOLD DRIVE LOW PROFILE, VERY LOW PARASITIC INDUCTANCE PowerSO-10 PACKAGE 10 1 PowerSO-10 INTERNAL SCHEMATIC DIAGRAM DESCRIPTION The STV160NF03L represents the second generation of Application Specific STMicroelectronics well established STripFETTM process based on a very unique strip layout design. The resulting MOSFET shows unrivalled high packing density with ultra low on-resistance and superior switching charactestics. Process simplification also translates into improved manufacturing reproducibility. This device is particularly suitable for high current, low voltage switching application where efficiency is crucial. APPLICATIONS BUCK CONVERTERS IN HIGH PERFORMACE TELECOM AND VRMs DC-DC CONVERTERS CONNECTION DIAGRAM (TOP VIEW) s ABSOLUTE MAXIMUM RATINGS Symb ol V DS V DGR VGS I D (**) ID I DM (*) P tot T st g Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k) Gate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 o C Drain Current (pulsed) T otal Dissipation at Tc = 25 o C Derating F actor Storage Temperature Max. Operating Junction T emperature o Value 30 30 20 160 113 640 160 1.07 -65 to 175 175 Unit V V V A A A W W /o C o C o C (*) Pulse width limited by safe operating area ( **) Limited only maximum junction temperature allowed by PowerSO-10 November 1999 1/8 STV160NF03L THERMAL DATA R thj -case R thj -amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature F or Soldering Purpose Max Max 0.9375 50 300 o o C/W C/W o C ELECTRICAL CHARACTERISTICS (TJ = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 30 1 10 100 Typ. Max. Unit V A A nA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = 15 V T c = 25 oC ON () Symbo l V GS(th) R DS(on) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance V GS V GS V GS V GS V GS V GS = = = = = = 10V 8V 4.5V 10V 8V 4.5V Test Con ditions ID = 250 A T c = 25 C o Min. 1 Typ. 1.7 1.9 2.0 4.0 Max. 2.5 2.8 3.8 6.7 6.4 7.8 12.8 Unit V m m m m m m A ID = ID = ID = ID = ID = ID = 80 80 40 80 80 40 A A A A A A T j = 175 C Tj = 175 oC o Tj = 175 C 160 o I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V DYNAMIC Symbo l g f s () Rg C iss C os s C rss C iss C os s C rss Parameter Forward Transconductance Gate resistance Input Capacitance Output Capacitance Reverse Transfer Capacitance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 15 V V DS = 15 V f = 1 MHz f = 1 MHz I D = 80 A V GS = 0 V GS = 0 Min. Typ. 210 0.9 4900 2950 565 7200 13000 4220 Max. Unit S pF pF pF pF pF pF V DS = 0 V f = 1 MHz V GS = 0 2/8 STV160NF03L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 15 V I D = 40 A R G = 4.7 V GS = 10 V (Resistive Load, see fig. 3) V DD = 16 V I D = 160 A V GS = 10 V Min. Typ. 23 350 103 38 9 Max. Unit ns ns nC nC nC SWITCHING OFF Symbo l t d(of f) tf t d(of f) tr (Voff) tf tc Parameter Turn-off Delay T ime Fall T ime Turn-off Delay T ime Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 15 V I D = 40 A V GS = 10 V R G =4.7 (Resistive Load, see fig. 3) V clamp = 16 V I D = 80 A V GS = 10 V R G = 4.7 (Induct ive Load, see fig. 5) Min. Typ. 105 120 85 46 335 404 Max. Unit ns ns ns ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 160 A V GS = 0 100 0.25 5 I SD = 80 A di/dt = 100 A/s V DD = 15 V (see test circuit, fig. 5) Test Con ditions Min. Typ. Max. 160 640 1.5 Unit A A V ns C A () Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STV160NF03L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STV160NF03L Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics Basic Schematic For Motherboard VRM Whith Synchronous Rectification Basic Schematic Mosfet Switch Used In Secondary Side Of a Foward Convert 5/8 STV160NF03L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STV160NF03L PowerSO-10 MECHANICAL DATA DIM. MIN. A A1 B c D D1 E E1 E2 E3 E4 e F H h L q 0 o mm TYP. MAX. 3.65 0.10 0.60 0.55 9.60 7.60 9.50 7.40 7.60 6.35 6.10 1.27 1.25 13.80 0.50 1.20 1.70 8 o inch MIN. 0.132 0.000 0.016 0.013 0.370 0.291 0.366 0.283 0.283 0.240 0.232 0.050 1.35 14.40 1.80 0.049 0.543 0.002 0.047 0.067 0.071 0.053 0.567 TYP. MAX. 0.144 0.004 0.024 0.022 0.378 0.300 0.374 0.291 0.300 0.250 0.240 3.35 0.00 0.40 0.35 9.40 7.40 9.30 7.20 7.20 6.10 5.90 B 0.10 A B 10 = H = A F A1 = 6 = = = E = 1 5 = E2 E3 E1 E4 = = A = SEATING PLANE DETAIL "A" e 0.25 M B C Q h D = D1 = = = SEATING PLANE = A1 L DETAIL "A" 0068039-C 7/8 STV160NF03L Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japa - Malaysia - Malta - Morocco n Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. 8/8 http://www.st.com . |
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